Ney Laert Vilar Calazans, Edson I. Moreno, Fabiano Hessel, Vitor M. da Rosa, Fernando Moraes, Everton Carara. From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study. In Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003. pages 355, IEEE Computer Society, 2003. [doi]
@inproceedings{CalazansMHRMC03,
title = {From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study},
author = {Ney Laert Vilar Calazans and Edson I. Moreno and Fabiano Hessel and Vitor M. da Rosa and Fernando Moraes and Everton Carara},
year = {2003},
doi = {10.1109/SBCCI.2003.1232853},
url = {http://dx.doi.org/10.1109/SBCCI.2003.1232853},
tags = {case study, modeling},
researchr = {https://researchr.org/publication/CalazansMHRMC03},
cites = {0},
citedby = {0},
pages = {355},
booktitle = {Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003},
publisher = {IEEE Computer Society},
isbn = {0-7695-2009-X},
}