Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology

Pedro P. Carballo, Omar Espino, Romen Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Núñez. Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. In 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013. pages 415-422, IEEE, 2013. [doi]

@inproceedings{CarballoENHSN13,
  title = {Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology},
  author = {Pedro P. Carballo and Omar Espino and Romen Neris and Pedro Hernandez-Fernandez and Tomasz Szydzik and Antonio Núñez},
  year = {2013},
  doi = {10.1109/DSD.2013.52},
  url = {http://dx.doi.org/10.1109/DSD.2013.52},
  researchr = {https://researchr.org/publication/CarballoENHSN13},
  cites = {0},
  citedby = {0},
  pages = {415-422},
  booktitle = {2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013},
  publisher = {IEEE},
}