Optimization of clock-gating structures for low-leakage high-performance applications

Javier Castro, Pilar Parra, Antonio J. Acosta. Optimization of clock-gating structures for low-leakage high-performance applications. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 3220-3223, IEEE, 2010. [doi]

@inproceedings{CastroPA10,
  title = {Optimization of clock-gating structures for low-leakage high-performance applications},
  author = {Javier Castro and Pilar Parra and Antonio J. Acosta},
  year = {2010},
  doi = {10.1109/ISCAS.2010.5537934},
  url = {http://dx.doi.org/10.1109/ISCAS.2010.5537934},
  tags = {optimization},
  researchr = {https://researchr.org/publication/CastroPA10},
  cites = {0},
  citedby = {0},
  pages = {3220-3223},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France},
  publisher = {IEEE},
}