A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding - researchr publication authors

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Benoit Catteau, Bart De Vuyst, Pieter Rombouts, Ludo Weyten. A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 3345-3348, IEEE, 2010. [doi]

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