Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers

Ediz Çetin, Süleyman Sirri Demirsoy, Izzet Kale, Richard C. S. Morling. Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers. In 13th European Signal Processing Conference, EUSIPCO 2005, Antalya, Turkey, September 4-8, 2005. pages 1-4, IEEE, 2005. [doi]

Authors

Ediz Çetin

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Süleyman Sirri Demirsoy

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Izzet Kale

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Richard C. S. Morling

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