Ediz Çetin, Süleyman Sirri Demirsoy, Izzet Kale, Richard C. S. Morling. Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers. In 13th European Signal Processing Conference, EUSIPCO 2005, Antalya, Turkey, September 4-8, 2005. pages 1-4, IEEE, 2005. [doi]
@inproceedings{CetinDKM05, title = {Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers}, author = {Ediz Çetin and Süleyman Sirri Demirsoy and Izzet Kale and Richard C. S. Morling}, year = {2005}, url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7078489}, researchr = {https://researchr.org/publication/CetinDKM05}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {13th European Signal Processing Conference, EUSIPCO 2005, Antalya, Turkey, September 4-8, 2005}, publisher = {IEEE}, isbn = {978-160-4238-21-1}, }