A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs - researchr publication authors

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Hakan Cetinkaya, Ali Zeki, Alper Girgin, Enver Derun Karabeyoglu, Tufan Coskun Karalar. A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs. In 25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018. pages 277-280, IEEE, 2018. [doi]

This author has not been identified. Look up 'Hakan Cetinkaya' in GoogleThis author has not been identified. Look up 'Ali Zeki' in GoogleThis author has not been identified. Look up 'Alper Girgin' in GoogleThis author has not been identified. Look up 'Enver Derun Karabeyoglu' in GoogleThis author has not been identified. Look up 'Tufan Coskun Karalar' in Google

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