Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling

Noureddine Chabini, Wayne Wolf. Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling. IEEE Trans. VLSI Syst., 12(6):573-589, 2004. [doi]

@article{ChabiniW04,
  title = {Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling},
  author = {Noureddine Chabini and Wayne Wolf},
  year = {2004},
  doi = {10.1109/TVLSI.2004.827569},
  url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2004.827569},
  tags = {power consumption},
  researchr = {https://researchr.org/publication/ChabiniW04},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {12},
  number = {6},
  pages = {573-589},
}