Krishnendu Chakrabarty, John P. Hayes. Cumulative balance testing of logic circuits. IEEE Trans. VLSI Syst., 3(1):72-83, 1995. [doi]
@article{ChakrabartyH95,
title = {Cumulative balance testing of logic circuits},
author = {Krishnendu Chakrabarty and John P. Hayes},
year = {1995},
doi = {10.1109/92.365455},
url = {http://doi.ieeecomputersociety.org/10.1109/92.365455},
tags = {testing, logic},
researchr = {https://researchr.org/publication/ChakrabartyH95},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {3},
number = {1},
pages = {72-83},
}