Test planning for modular testing of hierarchical SOCs

Krishnendu Chakrabarty, Vikram Iyengar, Mark D. Krasniewski. Test planning for modular testing of hierarchical SOCs. IEEE Trans. on CAD of Integrated Circuits and Systems, 24(3):435-448, 2005. [doi]

@article{ChakrabartyIK05,
  title = {Test planning for modular testing of hierarchical SOCs},
  author = {Krishnendu Chakrabarty and Vikram Iyengar and Mark D. Krasniewski},
  year = {2005},
  doi = {10.1109/TCAD.2004.842816},
  url = {http://dx.doi.org/10.1109/TCAD.2004.842816},
  tags = {testing},
  researchr = {https://researchr.org/publication/ChakrabartyIK05},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {24},
  number = {3},
  pages = {435-448},
}