A memory and area-efficient distributed arithmetic based modular VLSI architecture of 1D/2D reconfigurable 9/7 and 5/3 DWT filters for real-time image decomposition - researchr publication

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Anirban Chakraborty, Ayan Banerjee. A memory and area-efficient distributed arithmetic based modular VLSI architecture of 1D/2D reconfigurable 9/7 and 5/3 DWT filters for real-time image decomposition. J. Real-Time Image Processing, 17(5):1421-1446, 2020. [doi]

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