Chi-Hang Chan, Yan Zhu 0001, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 86-87, IEEE, 2012. [doi]
@inproceedings{Chan0SUM12,
title = {A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure},
author = {Chi-Hang Chan and Yan Zhu 0001 and Sai-Weng Sin and Seng-Pan U and Rui Paulo Martins},
year = {2012},
doi = {10.1109/VLSIC.2012.6243802},
url = {http://dx.doi.org/10.1109/VLSIC.2012.6243802},
researchr = {https://researchr.org/publication/Chan0SUM12},
cites = {0},
citedby = {0},
pages = {86-87},
booktitle = {Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012},
publisher = {IEEE},
isbn = {978-1-4673-0848-9},
}