Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application

M. Chanda, A. S. Chakraborty, S. Nag, R. Modak. Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-2, IEEE, 2014. [doi]

Authors

M. Chanda

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A. S. Chakraborty

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S. Nag

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R. Modak

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