M. Chanda, A. S. Chakraborty, S. Nag, R. Modak. Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-2, IEEE, 2014. [doi]
@inproceedings{ChandaCNM14,
title = {Design of sequential circuits using single-clocked Energy efficient adiabatic Logic for ultra low power application},
author = {M. Chanda and A. S. Chakraborty and S. Nag and R. Modak},
year = {2014},
doi = {10.1109/ISVDAT.2014.6881076},
url = {http://dx.doi.org/10.1109/ISVDAT.2014.6881076},
researchr = {https://researchr.org/publication/ChandaCNM14},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014},
publisher = {IEEE},
isbn = {978-1-4799-5088-1},
}