Sanghoan Chang, Gwan Choi. Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 109-114, IEEE Computer Society, 2007. [doi]
@inproceedings{ChangC07:6,
title = {Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits},
author = {Sanghoan Chang and Gwan Choi},
year = {2007},
doi = {10.1109/VLSID.2007.88},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.88},
tags = {exceptions, design},
researchr = {https://researchr.org/publication/ChangC07%3A6},
cites = {0},
citedby = {0},
pages = {109-114},
booktitle = {20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2502-4},
}