Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits

Sanghoan Chang, Gwan Choi. Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 109-114, IEEE Computer Society, 2007. [doi]

Abstract

Abstract is missing.