12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications

Jonathan Chang, Yen-Huei Chen, Wei-Min Chan, Sahil Preet Singh, Hank Cheng, Hidehiro Fujiwara, Jih-Yu Lin, Kao-Cheng Lin, John Hung, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu. 12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications. In 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017. pages 206-207, IEEE, 2017. [doi]

@inproceedings{ChangCCSCFLLHLL17,
  title = {12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications},
  author = {Jonathan Chang and Yen-Huei Chen and Wei-Min Chan and Sahil Preet Singh and Hank Cheng and Hidehiro Fujiwara and Jih-Yu Lin and Kao-Cheng Lin and John Hung and Robin Lee and Hung-Jen Liao and Jhon-Jhy Liaw and Quincy Li and Chih-Yung Lin and Mu-Chi Chiang and Shien-Yang Wu},
  year = {2017},
  doi = {10.1109/ISSCC.2017.7870333},
  url = {http://dx.doi.org/10.1109/ISSCC.2017.7870333},
  researchr = {https://researchr.org/publication/ChangCCSCFLLHLL17},
  cites = {0},
  citedby = {0},
  pages = {206-207},
  booktitle = {2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3758-2},
}