Meng-Fan Chang, Ming-Bin Chen, Lai-Fu Chen, Shu-Meng Yang, Yao-Jen Kuo, Jui-Jen Wu, Hsiu-Yun Su, Yuan-Hua Chu, Wen-Chin Wu, Tzu-Yi Yang, Hiroyuki Yamauchi. A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-V$_{\rm TH}$ Read-Port, and Offset Cell VDD Biasing Techniques. J. Solid-State Circuits, 48(10):2558-2569, 2013. [doi]
@article{ChangCCYKWSCWYY13,
title = {A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-V$_{\rm TH}$ Read-Port, and Offset Cell VDD Biasing Techniques},
author = {Meng-Fan Chang and Ming-Bin Chen and Lai-Fu Chen and Shu-Meng Yang and Yao-Jen Kuo and Jui-Jen Wu and Hsiu-Yun Su and Yuan-Hua Chu and Wen-Chin Wu and Tzu-Yi Yang and Hiroyuki Yamauchi},
year = {2013},
doi = {10.1109/JSSC.2013.2273835},
url = {http://dx.doi.org/10.1109/JSSC.2013.2273835},
researchr = {https://researchr.org/publication/ChangCCYKWSCWYY13},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {48},
number = {10},
pages = {2558-2569},
}