Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit

Hoseok Chang, Junho Cho, Wonyong Sung. Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2006, Proceedings, October 2-4, 2006, Banff, Alberta, Canada. pages 71-76, IEEE, 2006. [doi]

Authors

Hoseok Chang

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Junho Cho

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Wonyong Sung

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