An investigation of the impact of technology scaling on power wasted as short-circuit current in low voltage static CMOS circuits - researchr publication authors

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Amitava Chatterjee, Mahalingam Nandakumar, Ih-Chin Chen. An investigation of the impact of technology scaling on power wasted as short-circuit current in low voltage static CMOS circuits. In Mark Horowitz, Jan M. Rabaey, Brock Barton, Massoud Pedram, editors, Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996, Monterey, California, USA, August 12-14, 1996. pages 145-150, IEEE, 1996. [doi]

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