A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective

Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay. A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective. IEEE Trans. VLSI Syst., 19(5):809-817, 2011. [doi]

@article{ChatterjeeRYM11,
  title = {A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective},
  author = {Subho Chatterjee and Mitchelle Rasquinha and Sudhakar Yalamanchili and Saibal Mukhopadhyay},
  year = {2011},
  doi = {10.1109/TVLSI.2010.2041476},
  url = {http://dx.doi.org/10.1109/TVLSI.2010.2041476},
  tags = {architecture, design},
  researchr = {https://researchr.org/publication/ChatterjeeRYM11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {19},
  number = {5},
  pages = {809-817},
}