A memory mapping approach for parallel interleaver design with multiples read and write accesses - researchr publication authors

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Cyrille Chavet, Philippe Coussy. A memory mapping approach for parallel interleaver design with multiples read and write accesses. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 3168-3171, IEEE, 2010. [doi]

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