A Histogram-Based Background Interstage Error Estimation and Implementation Method in Pipelined ADCs

Amin Chegeni, Khayrollah Hadidi, Abdollah Khoei. A Histogram-Based Background Interstage Error Estimation and Implementation Method in Pipelined ADCs. IEEE Trans. on Circuits and Systems, 65-II(11):1519-1523, 2018. [doi]

Abstract

Abstract is missing.