Tze-Chiang Chen. Challenges for silicon technology scaling in the Nanoscale Era. In 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009. pages 1-7, IEEE, 2009. [doi]
@inproceedings{Chen09-114,
title = {Challenges for silicon technology scaling in the Nanoscale Era},
author = {Tze-Chiang Chen},
year = {2009},
doi = {10.1109/ESSCIRC.2009.5325955},
url = {https://doi.org/10.1109/ESSCIRC.2009.5325955},
researchr = {https://researchr.org/publication/Chen09-114},
cites = {0},
citedby = {0},
pages = {1-7},
booktitle = {35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009},
publisher = {IEEE},
isbn = {978-1-4244-4354-3},
}