Table of Contents

• ForewordY. Papananos, D. Tsoukalas. [doi]
• Challenges for silicon technology scaling in the Nanoscale EraTze-Chiang Chen. 1-7 [doi]
• Bio-inspired devices, circuits and systemsTadashi Shibata. 8-15 [doi]
• Scaling beyond CMOS: Turing-Heisenberg RapproachmentVictor V. Zhirnov, Ralph K. Cavin III. 16-22 [doi]
• Nanoelectromechanical systems: A new opportunity for microelectronicsMichael L. Roukes. 20 [doi]
• The impact of semiconductor packaging technologies on system integration an overviewCarlo Cognetti. 23-27 [doi]
• Ultra-thin chips and related applications, a new paradigm in silicon technologyJoachim N. Burghartz, Wolfgang Appel, Christine Harendt, Horst Rempp, Harald Richter 0001, Martin Zimmermann 0004. 28-35 [doi]
• RFID, where are they?Wim Dehaene, Georges G. E. Gielen, Michiel Steyaert, Hans Danneels, V. Desmedt, Christophe De Roover, Z. Li, Marian Verhelst, N. Van Helleputtea, S. Radioma, C. Walravensa, L. Pleysier. 36-43 [doi]
• The future of high frequency circuit designAli Hajimiri. 44-51 [doi]
• Embedded analog-to-digital convertersKlaas Bult. 52-64 [doi]
• Function by defects at the atomic scale - new concepts for non-volatile memoriesRainer Waser, Matthias Wuttig. 65-72 [doi]
• Nanowire electronicsJörg Appenzeller. 73-75 [doi]
• Performance, reliability, radiation effects, and aging issues in microelectronics - from atomic-scale physics to engineering-level modelingSokrates T. Pantelides, L. Tsetseris, M. J. Beck, S. N. Rashkeev, G. Hadjisavvas, I. G. Batyrev, B. R. Tuttle, A. G. Marinopoulos, X. J. Zhou, Daniel M. Fleetwood, Ronald D. Schrimpf. 76-83 [doi]
• Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?Thomas Chiarella, Liesbeth Witters, Abdelkarim Mercha, C. Kerner, R. Dittrich, Michal Rakowski, C. Ortolland, L.-Å. Ragnarsson, Bertrand Parvais, A. De Keersgieter, S. Kubicek, A. Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, Philippe Absil, S. Biesemans, Thomas K. Hoffmann. 84-87 [doi]
• Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and belowClaire Fenouillet-Béranger, P. Perreau, S. Denorme, L. Tosti, François Andrieu, Olivier Weber, S. Barnola, C. Arvet, Y. Campidelli, Sébastien Haendler, R. Beneyton, C. Perrot, C. de Buttet, P. Gros, L. Pham-Nguyen, F. Leverd, P. Gouraud, F. Abbate, F. Baron, A. Torres, C. Laviron, L. Pinzelli, J. Vetier, C. Borowiak, A. Margain, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Olivier Faynot, T. Skotnicki. 88-91 [doi]
• Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradationStefan Drapatz, Thomas Fischer, Karl Hofmann, Ettore Amirante, Peter Huber, Martin Ostermayr, Georg Georgakos, Doris Schmitt-Landsiedel. 92-95 [doi]
• Wideband inductorless minimal area RF front-endS. K. Hampel, O. Schmitz, Marc Tiebout, I. Rolfes. 96-99 [doi]
• Low-cost feedback-enabled LNAs in 45nm CMOSJonathan Borremans, Steven Thijs, Morin Dehan, Abdelkarim Mercha, Piet Wambacq. 100-103 [doi]
• Wide-band variable-gain LNA in 65 nm CMOS with inverter based amplifier for multi-tuners cable TV receptionSebastien Robert, Olivier Abed-Meraim, Luca Lo Coco. 104-107 [doi]
• 100-1000 MHz cutoff frequency, 0-12 dB boost programmable Gm-C filter with digital calibration for HDD read channelTakahide Terada, Taizo Yamawaki, Masaru Kokubo, Koji Nasu. 108-111 [doi]
• An oscilloscope array for high-impedance device characterizationFred Chen, Anantha Chandrakasan, Vladimir Stojanovic. 112-115 [doi]
• 3D capacitive transmission of analog signals with automatic compensation of the voltage attenuationEleonora Franchi, Federico Natali, Antonio Gnudi, Roberto Guerrieri, Massimiliano Innocenti, Luca Ciccarelli, Mauro Scandiuzzo, Roberto Canegallo. 116-119 [doi]
• A mixed-signal organic 1kHz comparator with low VT sensitivity on flexible plastic substrateHagen Marien, Michiel Steyaert, Nick A. J. M. van Aerle, Paul Heremans. 120-123 [doi]
• A highly linear, differential gyrator in 65nm CMOS for reconfigurable GHz applicationsO. Schmitz, S. K. Hampel, Koen L. R. Mertens, Marc Tiebout, I. Rolfes. 124-127 [doi]
• A low power, area efficient limiting amplifier in 90nm CMOSFilip Tavernier, Michiel Steyaert. 128-131 [doi]
• A 200 µA duty-cycled PLL for wireless sensor nodesSalvatore Drago, Domine Leenaerts, Bram Nauta, Fabio Sebastiano, Kofi A. A. Makinwa, Lucien J. Breems. 132-135 [doi]
• 25V sampling switch for power management data converters in 0.35µm CMOS with DNMOSDevrim Yilmaz Aksin, Ilter Özkaya. 136-139 [doi]
• Capacitive-coupled current sensing and Auto-ranging slope compensation for current mode SMPS with wide supply and frequency rangeStefan Herzer, Sumeet Kulkarni, Maciej Jankowski, Jochen Neidhardt, Bernhard Wicht. 140-143 [doi]
• An integrated 10A, 2.2ns rise-time laser-diode driver for LIDAR applicationsMike Wens, Jean-Michel Redoute, Tim Blanchaert, Nicolas Bleyaert, Michiel Steyaert. 144-147 [doi]
• Closed loop class-D amplifier with nonlinear loop integratorsBenno Krabbenborg, Marco Berkhout. 148-151 [doi]
• A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleavingPaolo Madoglio, A. Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas. 152-155 [doi]
• 647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGABenjamin Stefan Devlin, MyeongGyu Jeong, Toru Nakura, Makoto Ikeda, Kunihiro Asada. 156-159 [doi]
• A charge-recovery 600MHz FIR filter with 1.5-cycle latency overheadJerry C. Kao, Wei-Hsiang Ma, Visvesh S. Sathe 0001, Marios C. Papaefthymiou. 160-163 [doi]
• Subthreshold SCL for ultra-low-power SRAM and low-activity-rate digital systemsArmin Tajalli, Yusuf Leblebici. 164-167 [doi]
• A 60GHz power amplifier with 14.5dBm saturation power and 25% peak PAE in CMOS 65nm SOIAlexandre Siligaris, Yasuhiro Hamada, Christopher Mounet, Christine Raynaud, Baudouin Martineau, Nicolas Deparis, Nathalie Rolland, Muneo Fukaishi, Pierre Vincent. 168-171 [doi]
• A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detectionJean Gorisse, Andreia Cathelin, Andreas Kaiser, Eric Kerherve. 172-175 [doi]
• A 2.4-GHz 24-dBm SOI CMOS power amplifier with on-chip tunable matching network for enhanced efficiency in back-offFrancesco Carrara, Calogero D. Presti, Giuseppe Palmisano. 176-179 [doi]
• A double balanced power amplifier for S-band phased arrays in SiGe BiCMOSHolger Erkens, Ralf Wunderlich, Stefan Heinen. 180-183 [doi]
• A low-power wide-band digital frequency synthesizer for cognitive radio sensor unitsLiangge Xu, Kari Stadius, Jussi Ryynänen. 184-187 [doi]
• A single-chip RF tuner / OFDM demodulator for mobile digital TV applicationTsuyoshi Sekine, Ryuichi Fujimoto, Yoshimitsu Takamatsu, M. Nakamura, Takuya Hirakawa, M. Ishii, T. Yasuda, M. Hayashi, H. Itoh, Y. Wada, Teruo Imayama, Tatsuro Oomoto, Yosuke Ogasawara, Shigehito Saigusa, M. Yano, M. Nishikawa, H. Yoshida, Y. Yoshida, K. Yoshioka, N. Itoh. 188-191 [doi]
• An S-band frontend receiver for mobile TV in 65nm CMOSTheodoros Chalvatzis, Kostis Vavelidis, Nikos Kanakaris, Iason Vassiliou. 192-195 [doi]
• A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technologyMarek Gersbach, Y. Maruyama, E. Labonne, J. Richardson, R. Walker, L. Grant, R. Henderson, Fausto Borghetti, David Stoppa, Edoardo Charbon. 196-199 [doi]
• Pulsed time-of-flight 3D-CMOS imaging using photogate-based active pixel sensorsAndreas Spickermann, Daniel Durini, Stefan Brocker, Werner Brockherde, Bedrich J. Hosticka, Anton Grabmaier. 200-203 [doi]
• A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domainDavid Stoppa, Fausto Borghetti, Justin A. Richardson, Richard Walker 0004, Lindsay Grant, Robert K. Henderson, Marek Gersbach, Edoardo Charbon. 204-207 [doi]
• A 134-pixel CMOS sensor for combined time-of-flight and Optical Triangulation 3-D imagingOreste Sgrott, Daniel Mosconi, Massimo Saiani, David Stoppa, Gianmaria Pedretti, Matteo Perenzoni, Lorenzo Gonzo. 208-211 [doi]
• A 3-V, 6-bit C-2C digital-to-analog converter using complementary organic thin-film transistors on glassWei Xiong, Yang Guo, Boris Murmann, Ute Zschieschang, Hagen Klauk. 212-215 [doi]
• A low variation GHz ring oscillator with addition-based current sourceXuan Zhang 0001, Alyssa B. Apsel. 216-219 [doi]
• Challenges and prospects of RF oscillators using silicon resonant tunneling diodesE. Buccafurri, Abdelkrim Medjahdi, Francis Calmon, Raphael Clerc, M. Pala, A. Poncet, Gérard Ghibaudo. 220-223 [doi]
• A 1x1 802.11n WLAN SoC with fully integrated RF front-end utilizing PA linearizationM. Terrovitis, M. Mack, J. Hwang, B. Kaczynski, G. Tseng, B. Wang, S. Mehta, D. Su. 224-227 [doi]
• A single-chip CMOS UHF RFID Reader transceiver for mobile applicationsLe Ye, Huailin Liao, Fei Song, Jiang Chen, Congyin Shi, Chen Li 0014, Junhua Liu, Ru Huang, Jinshu Zhao, Huiling Xiao, RuiQiang Liu, Xinan Wang. 228-231 [doi]
• A 400-MHz CMOS radio front-end for ultra low-power medical implantable applicationsFrancesco Carrara, Alessandro Italia, Giuseppe Palmisano, R. Guerra. 232-235 [doi]
• Extraneous-light resistant multipixel range sensor based on a low-power correlating pixel-circuitGerald Zach, Milos Davidovic, Horst Zimmermann. 236-239 [doi]
• A pixel-shared CMOS image sensor using lateral overflow gateShin Sakai, Yoshiaki Tashiro, Nana Akahane, Rihito Kuroda, Koichi Mizobuchi, Shigetoshi Sugawa. 240-243 [doi]
• High precision optical angle measuring method applicable in standard CMOS technologyChristian Koch 0004, Jürgen Oehm, Andreas Gornik. 244-247 [doi]
• A real-time image recognition system using a global directional-edge-feature extraction VLSI processorHongbo Zhu, Tadashi Shibata. 248-251 [doi]
• A CMOS ESD-protected RF front-end for UWB receiverBo Shi, Michael Yan Wah Chia. 252-255 [doi]
• Ultra low power detection circuits in 130nm CMOS for a wireless UWB localization systemChristophe De Roover, Michiel Steyaert. 256-259 [doi]
• A 240MHz programmable gain amplifier & filter for ultra low power low-rate UWB receiversS. D'Amico, Andrea Baschirotto, Kathleen Philips, Olivier Rousseaux, Bert Gyselinckx. 260-263 [doi]
• A wideband 0 to 60 dB CMOS variable gain amplifier for IR-UWB I/Q receiversDavid Barras, Heinz Jäckel, Walter Hirt. 264-267 [doi]
• Sub-1V input single-inductor dual-output (SIDO) DC-DC converter with adaptive load-tracking control (ALTC) for single-cell-powered systemMing-Hsin Huang, Yu-Nong Tsai, Yu-Huei Lee, Shih-Jung Wang, Ke-Horng Chen, Ying-Hsi Lin, Gin-Kou Ma. 268-271 [doi]
• A high efficiency and compact size 65nm power management module with 1.2v low-voltage PWM controller for UWB system applicationYu-Huei Lee, Shih-Jung Wang, Yao-Yi Yang, Kuo-Lin Zheng, Po-Fung Chen, Chun-Yu Hsieh, Ming-Hsin Huang, Yu-Nong Tsai, Yu-Zhou Ke, Ke-Horng Chen, Yi-Kuang Chen, Chen-Chih Huang, Ying-Hsi Lin. 272-275 [doi]
• An integrated Shunt-LDO regulator for serial powered systemsMichael Karagounis, David Arutinov, Marlon Barbero, Fabian Huegging, Hans Krueger, Norbert Wermes. 276-279 [doi]
• A 60 µW low-power low-voltage power management unit for a self-powered system based on low-cost piezoelectric powering generatorsJordi Colomer-Farrarons, Pedro Lluís Miribel-Català, Alberto Saiz-Vela, Josep Samitier. 280-283 [doi]
• A self-adaptive switched-capacitor voltage converter with dynamic input load control for energy harvestingDominic Maurath, Yiannos Manoli. 284-287 [doi]
• A 300Hz 19b DR capacitive accelerometer based on a versatile front end in a 5th-order ΔΣ loopMarc Pastre, Maher Kayal, Hanspeter Schmid, Alexander Huber, Pascal Zwahlen, Anne-Marie Nguyen, Yufeng Dong. 288-291 [doi]
• A multifunction low-power preamplifier for MEMS capacitive microphonesS. A. Jawed1, Jannik Hammel Nielsen, Massimo Gottardi, Andrea Baschirotto, Erik Bruun. 292-295 [doi]
• A digitally-assisted electrothermal frequency-locked loopS. Mahdi Kashmiri, Kofi A. A. Makinwa. 296-299 [doi]
• Merged power amplifier and mixer circuit topology for radar applications in CMOSVadim Issakov, Marc Tiebout, Herbert Knapp, Yiqun Cao, Werner Simbürger. 300-303 [doi]
• A 19GHz, 250pJ/bit non-linear BPSK demodulator in 90nm CMOSJosé Gabriel Macias-Montero, H. Yan, Atef Akhnoukh, Leo C. N. de Vreede, John R. Long, José María López-Villegas, John J. Pekarik. 304-307 [doi]
• Low-noise ESD-protected 24 GHz receiver for radar applications in SiGe: C technologyVadim Issakov, Herbert Knapp, Filippo Magrini, Andreas Thiede, Werner Simbürger, Linus Maurer. 308-311 [doi]
• A low noise, high gain, highly linear mixer for 77 GHz automotive radar applications in SiGe: C bipolar technologyS.-J. Yang, H. P. Forstner, G. Haider, H. Kainmueller, Klaus Aufinger, Linus Maurer, Richard Hagelauer. 312-315 [doi]
• 122 GHz low-noise-amplifier in sige technologyW. Winkler, Wojciech Debski, Bernd Heinemann, Falk Korndörfer, Holger Rücker, Klaus Schmalz, Christoph Scheytt, Bernd Tillack. 316-319 [doi]
• A 110µW single bit audio continuous-time oversampled converter with 92.5 db dynamic rangeShanthi Pavan, Prabu Sankar. 320-323 [doi]
• A 1.0 mW, 71 dB SNDR, -1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphonesLuca Picolli, Marco Grassi, Luca Rosson, Piero Malcovati, Andrea Fornasari. 324-327 [doi]
• A 0.5 V feedforward delta-sigma modulator with inverter-based integratorJun Wang 0009, Toshimasa Matsuoka, Kenji Taniguchi 0001. 328-331 [doi]
• A 1-V 84-dB DR 1-MHz bandwidth cascade 3-1 Delta-Sigma ADC in 65-nm CMOSKoen Cornelissens, Michiel Steyaert. 332-335 [doi]
• A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOSPieter Crombez, Geert Van der Plas, Michiel Steyaert, Jan Craninckx. 336-339 [doi]
• Power reduction techniques for an 8-core xeon® processorStefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora. 340-343 [doi]
• A 2.89mW 50GOPS 16×16 16-core MIMO sphere decoder in 90nm CMOSChia-Hsiang Yang, Dejan Markovic. 344-347 [doi]
• A Microprogrammable Memory Controller for high-performance dataflow applicationsJérôme Martin, Christian Bernard, Fabien Clermidy, Yves Durand. 348-351 [doi]
• A yield centric statistical design method for optimization of the SRAM active columnT. S. Doorn, J. A. Croon, E. J. W. Ter Maten, A. Di Bucchianico. 352-355 [doi]
• A resonant-clock 200MHz ARM926EJ-STM microcontrollerAlexander T. Ishii, Jerry C. Kao, Visvesh S. Sathe 0001, Marios C. Papaefthymiou. 356-359 [doi]
• FinFET RF receiver building blocks operating above 10 GHzDomagoj Siprak, Piet Wambacq, Bertrand Parvais, Abdelkarim Mercha, Michael Fulde, Jesenka Veledar Kruger, Morin Dehan, Stefaan Decoutere. 360-363 [doi]
• Assessment of the impact of technology scaling on the performance of LC-VCOsDavide Ponton, Gerhard Knoblinger, Andreas Roithmeier, Marc Tiebout, Michael Fulde, Pierpaolo Palestri. 364-367 [doi]
• Oxide Soft Breakdown : From device modeling to small circuit simulationL. Gerrer, Gérard Ghibaudo, G. Ribes. 368-371 [doi]
• A 10Gb/s NRZ receiver with feedforward equalizer and glitch-free phase-frequency detectorAli Kiaei, Mounir Bohsali, Ahmad Bahai, Thomas H. Lee. 372-375 [doi]
• An 11.1Gbps analog PRML receiver for EDC of up to 400km-reach WDM fiber-optic linksSalam Elahmadi, Matthias Bussmann, Jomo Edwards, Kelvin Tran, Lloyd F. Linder, Christopher Gill, Harry Tan, Devin Ng, Dalius Baranauskas, Denis Zelenin. 376-379 [doi]
• Low-jitter fractional spread-spectrum clock generator using fast-settling dual charge-pump technique for Serial-ATA applicationTakashi Kawamoto, Tomoaki Takahashi, Shigeyuki Suzuki, Takayuki Noto, Katsushi Asahina. 380-383 [doi]
• Design and phase noise analysis of a multiphase 6 to 11 GHz PLLGeorge von Büren, David Barras, Heinz Jäckel, Alex Huber, Christian Kromer, Marcel A. Kossel. 384-387 [doi]
• Designing ultra-low voltage PLL Using a bulk-driven techniqueTing-Sheng Chao, Yu-lung Lo, Wei-Bin Yang, Kuo-Hsing Cheng. 388-391 [doi]
• A 30-MHz, 90-ppm/°C fully-integrated clock reference generator with frequency-locked loopKen Ueno, Tetsuya Asai, Yoshihito Amemiya. 392-395 [doi]
• A 0.4-1.4V 24MHz fully integrated 33µW, 104ppm/V supply-independent oscillator for RFIDsValentijn De Smedt, Wim Dehaene, Georges G. E. Gielen. 396-399 [doi]
• A 118.4GB/s multi-casting network-on-chip for real-time object recognition processorJoo-Young Kim 0001, Kwanho Kim, Seungjin Lee 0001, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo. 400-403 [doi]
• A 1.69 Gb/s area-efficient AES crypto core with compact on-the-fly key expansion unitPo-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee. 404-407 [doi]
• Area and latency optimized high-throughput Min-Sum based LDPC decoder architecturesMatthias Korb, Tobias G. Noll. 408-411 [doi]
• A 11.5-Gbps LDPC decoder based on CP-PEG code constructionChih-Lung Chen, Kao-Shou Lin, Hsie-Chia Chang, Wai-Chi Fang, Chen-Yi Lee. 412-415 [doi]
• An integrated common-mode feedback topology for multi-frequency bioimpedance imagingMohamad Rahal, Andreas Demosthenous, Richard H. Bayford. 416-419 [doi]
• An ambient light adaptive subretinal stimulatorLiu Liu, Jürgen Wünschmann, Naser Pour Aryan, Amr Zohny, Michael Fischer, Steffen Kibbel, Albrecht Rothermel. 420-423 [doi]
• A fully on-chip LDO voltage regulator for remotely powered cortical implantsVahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici. 424-427 [doi]
• A SPAD-based pixel linear array for high-speed time-gated fluorescence lifetime imagingLucio Pancheri, David Stoppa. 428-431 [doi]
• A 5.8GHz LC-based digitally controlled oscillator with 20kHz frequency resolution and 37 % tuning rangeRachid El Waffaoui, Simon Lee. 432-435 [doi]
• A 20-GHz 1-V VCO with dual-transformer configuration and a pseudo-static divider on self-stabilized conceptTakahiro Nakamura, Toru Masuda, Nobuhiro Shiramizu, Akihiro Nakamura, Katsuyoshi Washio. 436-439 [doi]
• A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOSYuka Kobayashi, Shuhei Amakawa, Noboru Ishihara, Kazuya Masu. 440-443 [doi]
• A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOSStefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani. 444-447 [doi]
• Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOSJinhua Ni, Zhiliang Hong, Bill Yang Liu. 448-451 [doi]
• High efficiency DC-DC buck converter with 60/120-MHz switching frequency and 1-A output currentMassimiliano Belloni, Edoardo Bonizzoni, Franco Maloberti. 452-455 [doi]
• High efficiency buck-boost converter with reduced average inductor current (RAIC) techniquePing-Ching Huang, Wei-Quan Wu, Hsin-Hsin Ho, Ke-Horng Chen, Gin-Kou Ma. 456-459 [doi]
• A MOS current-mode buck DC-DC Converter with a 240-kHz loop bandwidth and unaltered frequency characteristics using a quadratic and input-voltage-dependent compensation slopeYasuhiro Sugimoto. 460-463 [doi]
• A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behaviorPaul Veldhorst, George Goksun, Anne-Johan Annema, Bram Nauta, Berry A. J. Buter, Maarten Vertregt. 464-467 [doi]
• A 2.85mW 0.12mm2 1.0V 11-bit 20-MS/s algorithmic ADC in 65nm CMOSJae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Sang-Gug Lee, Jong-Kee Kwon. 468-471 [doi]
• A digitally calibrated 14-bit linear 100-MS/s pipelined ADC with wideband sampling frontendLei Luo, Kaihui Lin, Long Cheng, Liren Zhou, Fan Ye, Junyan Ren. 472-475 [doi]
• An 8th-order MASH delta-sigma with an OSR of 3Trevor C. Caldwell, David A. Johns. 476-479 [doi]