Stefan Rusu - researchr alias

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Viewing Publication 1 - 35 from 35

2020

2019

2016

Introduction to the Special Issue on the 41st European Solid-State Circuits Conference (ESSCIRC)Andrea Mazzanti, Bram Nauta, Stefan Rusu. jssc, 51(7):1511-1513, 2016. [doi]

Welcome to 2016 Hot ChipsStefan Rusu. hotchips 2016: 1-10 [doi]

2015

Introduction to the Special Section on the 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)Stefan Rusu, Gregory Chen. jssc, 50(11):2472-2474, 2015. [doi]

A 22 nm 15-Core Enterprise Xeon® Processor FamilyStefan Rusu, Harry Muljono, David Ayers, Simon Tam, Wei Chen, Aaron Martin, Shenggao Li, Sujal Vora, Raj Varada, Eddie Wang. jssc, 50(1):35-48, 2015. [doi]

2014

Introduction to the Special Issue on the 39th European Solid-State Circuits Conference (ESSCIRC)Yann Deval, Stefan Rusu. jssc, 49(7):1460-1462, 2014. [doi]

5.4 Ivytown: A 22nm 15-core enterprise Xeon® processor familyStefan Rusu, Harry Muljono, David Ayers, Simon M. Tam, Wei Chen, Aaron Martin, Shenggao Li, Sujal Vora, Raj Varada, Eddie Wang. isscc 2014: 102-103 [doi]

2010

A 45 nm 8-Core Enterprise Xeon¯ ProcessorStefan Rusu, Simon Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora. jssc, 45(1):7-14, 2010. [doi]

2009

2008

Introduction to the Special Issue on the 33rd European Solid-State Circuits Conference (ESSCIRC 2007)Andrea Baschirotto, Edoardo Charbon, Stefan Rusu. jssc, 43(7):1507-1510, 2008. [doi]

Short CourseIan Galton, Jonathan Audy, Vadim Ivanov, Stefan Rusu, Seth R. Sanders. isscc 2008: 648-649 [doi]

2007

2006

A Dual-Core Multi-Threaded Xeon Processor with 16MB L3 CacheStefan Rusu, Simon M. Tam, Harry Muljono, David Ayers, Jonathan Chang. isscc 2006: 315-324 [doi]

2005

2004

Itanium 2 Processor 6M: Higher Frequency and Larger L3 CacheStefan Rusu, Harry Muljono, Brian S. Cherkauer. micro, 24(2):10-18, 2004. [doi]

Clock generation and distribution in high-performance processorsStefan Rusu. issoc 2004: [doi]

2003

2002

Guest editorialChristian C. Enz, Stefan Rusu. jssc, 37(7):795-797, 2002. [doi]

Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract)Stefan Rusu, Manoj Sachdev, Christer Svensson, B. Nauta. vlsid 2002: 16-17 [doi]

2000

Clock generation and distribution for the first IA-64 microprocessorSimon Tam 0001, Stefan Rusu, Utpal Nagarji Desai, Robert Kim, Ji Zhang, Ian Young 0001. jssc, 35(11):1545-1552, 2000. [doi]

Itanium processor clock designUtpal Desai, Simon Tam, Robert Kim, Ji Zhang, Stefan Rusu. ispd 2000: 94-98 [doi]

The first IA-64 microprocessorStefan Rusu, Gadi Singer. jssc, 35(11):1539-1544, 2000. [doi]

1993

TONIC: A timing database for VLSI designGregory Schulte, Peter Tong, Stefan Rusu, Stuart Taylor. eurodac 1993: 426-431 [doi]

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