A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving

Paolo Madoglio, A. Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas. A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving. In 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009. pages 152-155, IEEE, 2009. [doi]

Abstract

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