Chien-In Henry Chen. Graph Partitioning for Concurrent Test Scheduling in VLSI Circuit. In DAC. pages 287-290, 1991. [doi]
@inproceedings{Chen91,
title = {Graph Partitioning for Concurrent Test Scheduling in VLSI Circuit},
author = {Chien-In Henry Chen},
year = {1991},
doi = {10.1145/127601.127682},
url = {http://doi.acm.org/10.1145/127601.127682},
tags = {testing, graph-rewriting, rewriting, partitioning},
researchr = {https://researchr.org/publication/Chen91},
cites = {0},
citedby = {0},
pages = {287-290},
booktitle = {DAC},
}