The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice

Yongliang Chen, Xiaole Cui, Xiaoxin Cui, Xing Zhang. The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice. Microelectronics Journal, 144:106088, February 2024. [doi]

@article{ChenCCZ24-0,
  title = {The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice},
  author = {Yongliang Chen and Xiaole Cui and Xiaoxin Cui and Xing Zhang},
  year = {2024},
  month = {February},
  doi = {10.1016/j.mejo.2023.106088},
  url = {https://doi.org/10.1016/j.mejo.2023.106088},
  researchr = {https://researchr.org/publication/ChenCCZ24-0},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {144},
  pages = {106088},
}