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An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability

Junchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang. An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 1835-1838, IEEE, 2012. [doi]

Authors

Junchao Chen

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Kwen-Siong Chong

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Bah-Hwee Gwee

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Joseph S. Chang

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