Junchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang. An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 1835-1838, IEEE, 2012. [doi]
@inproceedings{ChenCGC12,
title = {An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability},
author = {Junchao Chen and Kwen-Siong Chong and Bah-Hwee Gwee and Joseph S. Chang},
year = {2012},
doi = {10.1109/ISCAS.2012.6271625},
url = {http://dx.doi.org/10.1109/ISCAS.2012.6271625},
researchr = {https://researchr.org/publication/ChenCGC12},
cites = {0},
citedby = {0},
pages = {1835-1838},
booktitle = {2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012},
publisher = {IEEE},
isbn = {978-1-4673-0218-0},
}