Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking

Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O Leary, Xudong Zhao. Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. In Mandayam K. Srivas, Albert John Camilleri, editors, Formal Methods in Computer-Aided Design, First International Conference, FMCAD 96, Palo Alto, California, USA, November 6-8, 1996, Proceedings. Volume 1166 of Lecture Notes in Computer Science, pages 19-33, Springer, 1996.

Abstract

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