Yatin Vasant Hoskote - researchr alias

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Viewing Publication 1 - 15 from 15

2009

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit PerspectivesRadu Marculescu, Ümit Y. Ogras, Li-Shiuan Peh, Natalie D. Enright Jerger, Yatin Vasant Hoskote. tcad, 28(1):3-21, 2009. [doi]

2008

Guest Editors Introduction: Tackling Key Problems in NoCsYatin Vasant Hoskote, Radu Marculescu, Li-Shiuan Peh. dt, 25(5):400-401, 2008. [doi]

2006

A 6.2-GFlops Floating-Point Multiply-Accumulator With Conditional NormalizationSriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Atila Alvandpour. jssc, 41(10):2314-2323, 2006. [doi]

2003

A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOSYatin Vasant Hoskote, Bradley A. Bloechel, Gregory E. Dermer, Vasantha Erraguntla, David Finan, Jason Howard, Dan Klowden, Siva G. Narendra, Greg Ruhl, James W. Tschanz, Sriram R. Vangal, Venkat Veeramachaneni, Howard Wilson, Jianping Xu, Nitin Borkar. jssc, 38(11):1866-1875, 2003. [doi]

1999

Coverage Estimation for Symbolic Model CheckingYatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao. dac 1999: 300-305 [doi]

1998

Abstraction Techniques for Validation Coverage Analysis and Test GenerationDinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote. TC, 47(1):2-14, 1998.

1997

Automatic verification of implementations of large circuits against HDL specificationsYatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell, John Moondanos. tcad, 16(3):217-228, 1997. [doi]

1996

Verification of All Circuits in a Floating-Point Unit Using Word-Level Model CheckingYirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O Leary, Xudong Zhao. FMCAD 1996: 19-33

A Unified Framework for Design Validation and Manufacturing TestDinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote. itc 1996: 875-884

1995

Verification of transient response of linear analog circuitsAshok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham. vts 1995: 42-47 [doi]

Automated verification of temporal properties specified as state machines in VHDLYatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell. glvlsi 1995: 100-105 [doi]

Automatic extraction of the control flow machine and application to evaluating coverage of verification vectorsYatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham. iccd 1995: 532-537 [doi]

1994

Verification of Circuits Described in VHDL through Extraction of Design IntentYatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell. vlsid 1994: 417-420

Abstraction of data path registers for multilevel verification of large circuitsYatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell. glvlsi 1994: 11-14 [doi]

1992

Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor SystemsV. S. S. Nair, Yatin Vasant Hoskote, Jacob A. Abraham. TC, 41(5):532-541, 1992.

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