CriAS: a performance-driven criticality-aware synthesis flow for on-chip multicycle communication architecture

Chia-I Chen, Juinn-Dar Huang. CriAS: a performance-driven criticality-aware synthesis flow for on-chip multicycle communication architecture. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. pages 67-72, IEEE, 2009. [doi]

Abstract

Abstract is missing.