Stochastic computational models for accurate reliability evaluation of logic circuits

Hao Chen, Jie Han. Stochastic computational models for accurate reliability evaluation of logic circuits. In R. Iris Bahar, Fabrizio Lombardi, David Atienza, Erik Brunvand, editors, Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010. pages 61-66, ACM, 2010. [doi]

Abstract

Abstract is missing.