Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos

To-Wei Chen, Yu-Wen Huang, Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen. Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 2931-2934, IEEE, 2005. [doi]

Abstract

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