MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems

Di Chen, Hai Jin, Xiaofei Liao, Haikun Liu, Rentong Guo, Dong Liu. MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems. In David Atienza, Giorgio Di Natale, editors, Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017. pages 1086-1091, IEEE, 2017. [doi]

Abstract

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