A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-µm CMOS

Liang-Jen Chen, Shen-Iuan Liu. A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-µm CMOS. IEEE Trans. VLSI Syst., 24(4):1470-1483, 2016. [doi]

Authors

Liang-Jen Chen

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Shen-Iuan Liu

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