The following publications are possibly variants of this publication:
- A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOSShuai Chen, Hao Li, Liqiong Yang, Zongren Yang, Weiwu Hu, Patrick Yin Chiang. cicc 2013: 1-4 [doi]
- An integrated 0.35mum CMOS optical receiver with clock and data recovery circuitYi-Ju Chen, Monuko du Plessis. mj, 37(9):985-992, 2006. [doi]
- A low-power all-digital GFSK demodulator with robust clock data recoveryPengpeng Chen, Bo Zhao, Rong Luo, Huazhong Yang. glvlsi 2012: 123-128 [doi]