A low-jitter and low-power phase-locked loop design

Kuo-Hsing Chen, Huan-Sen Liao, Lin-Jiunn Tzou. A low-jitter and low-power phase-locked loop design. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 257-260, IEEE, 2000. [doi]

@inproceedings{ChenLT00,
  title = {A low-jitter and low-power phase-locked loop design},
  author = {Kuo-Hsing Chen and Huan-Sen Liao and Lin-Jiunn Tzou},
  year = {2000},
  doi = {10.1109/ISCAS.2000.856310},
  url = {https://doi.org/10.1109/ISCAS.2000.856310},
  researchr = {https://researchr.org/publication/ChenLT00},
  cites = {0},
  citedby = {0},
  pages = {257-260},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
  publisher = {IEEE},
}