A low-jitter and low-power phase-locked loop design

Kuo-Hsing Chen, Huan-Sen Liao, Lin-Jiunn Tzou. A low-jitter and low-power phase-locked loop design. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 257-260, IEEE, 2000. [doi]

Abstract

Abstract is missing.