A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers - researchr publication authors

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Chien-Chang Chen, Wai-Kei Mak. A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 777-782, IEEE, 2006. [doi]

This author has not been identified. Look up 'Chien-Chang Chen' in GoogleThis author has not been identified. Look up 'Wai-Kei Mak' in Google

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