A 2× load/store pipe for a low-power 1-GHz embedded processor

Zongjian Chen, Daniel Murray, Steve Nishimoto, Mark H. Pearce, Max Oyker, Daniel Rodriguez, Robert Rogenmoser, Dongwook (Drew) Suh, Erik Supnet, Vincent von Kaenel, George Yiu. A 2× load/store pipe for a low-power 1-GHz embedded processor. J. Solid-State Circuits, 38(11):1857-1865, 2003. [doi]

Abstract

Abstract is missing.