Circuit-level mismatch modelling and yield optimization for CMOS analog circuits

Mingjing Chen, Alex Orailoglu. Circuit-level mismatch modelling and yield optimization for CMOS analog circuits. In 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings. pages 526-532, IEEE, 2007. [doi]

Abstract

Abstract is missing.