Combining technology mapping and placement for delay-optimization in FPGA designs

Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin. Combining technology mapping and placement for delay-optimization in FPGA designs. In Michael R. Lightner, Jochen A. G. Jess, editors, Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 1993. pages 123-127, IEEE Computer Society, 1993. [doi]

Abstract

Abstract is missing.