An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology - researchr publication authors

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Qingyu Chen, Haibin Wang, Li Chen, Lixiang Li, Xing Zhao, Rui Liu, Mo Chen, Xuantian Li. An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology. J. Electronic Testing, 32(3):385-391, 2016. [doi]

This author has not been identified. Look up 'Qingyu Chen' in GoogleThis author has not been identified. Look up 'Haibin Wang' in GoogleThis author has not been identified. Look up 'Li Chen' in GoogleThis author has not been identified. Look up 'Lixiang Li' in GoogleThis author has not been identified. Look up 'Xing Zhao' in GoogleThis author has not been identified. Look up 'Rui Liu' in GoogleThis author has not been identified. Look up 'Mo Chen' in GoogleThis author has not been identified. Look up 'Xuantian Li' in Google

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