An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology

Qingyu Chen, Haibin Wang, Li Chen, Lixiang Li, Xing Zhao, Rui Liu, Mo Chen, Xuantian Li. An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology. J. Electronic Testing, 32(3):385-391, 2016. [doi]

Abstract

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