Improving system latency of AI accelerator with on-chip pipelined activation preprocessing and multi-mode batch inference

Wenxuan Chen, Zheng Wang, Ming Lei, Bo Dong, Zhuo Wang, Yongkui Yang, Chao Chen 0022, Weiyu Guo, Chen Liang, Qian Zhang, Wenqi Fang, Zhibin Yu. Improving system latency of AI accelerator with on-chip pipelined activation preprocessing and multi-mode batch inference. In 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021, Washington, DC, USA, June 6-9, 2021. pages 1-4, IEEE, 2021. [doi]

@inproceedings{ChenWLDWY0GLZFY21,
  title = {Improving system latency of AI accelerator with on-chip pipelined activation preprocessing and multi-mode batch inference},
  author = {Wenxuan Chen and Zheng Wang and Ming Lei and Bo Dong and Zhuo Wang and Yongkui Yang and Chao Chen 0022 and Weiyu Guo and Chen Liang and Qian Zhang and Wenqi Fang and Zhibin Yu},
  year = {2021},
  doi = {10.1109/AICAS51828.2021.9458529},
  url = {https://doi.org/10.1109/AICAS51828.2021.9458529},
  researchr = {https://researchr.org/publication/ChenWLDWY0GLZFY21},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021, Washington, DC, USA, June 6-9, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-1913-0},
}