PipeCHX: A High-Bandwidth-Low-Latency Hybrid CXL Memory Controller

Xingyu Chen, Fei Wang, Yuan Tian, Shan Zhao, Xiaoyong Xue, Xiaoyang Zeng. PipeCHX: A High-Bandwidth-Low-Latency Hybrid CXL Memory Controller. IEEE Trans. VLSI Syst., 34(4):1253-1266, April 2026. [doi]

Abstract

Abstract is missing.