An economical scan design for sequential logic test generation

Kwang-Ting Cheng, Vishwani D. Agrawal. An economical scan design for sequential logic test generation. In Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, FTCS 1989, Chicago, IL, USA, 21-23 June, 1989. pages 28-35, IEEE Computer Society, 1989. [doi]

Abstract

Abstract is missing.